The International Symposium on Low Power Electronics and Design (ISLPED) is the premier forum for presentation of recent advances in all aspects of low power design and technologies, ranging from process and circuit technologies, to simulation and synthesis tools, to system level design and optimization.

News and Announcements

1. ISLPED'14 was a successful event! We would like to thank all attendees and of course our speakers, in particular the invited speakers and the tutorial and keynote presenters. Some of the tutorial and invited talk slides, as well as the keynote slides, have been made graciously available by the presenters, and the organizers are thankful to them! Please follow the Slides Link to download the PDF files as they become available.
2. The Final Program is now available! Conference attendees can also use the Whova Portal to find out information about the program schedule, and other useful resources by using the Whova ISLPED 2014 App.
3. Transportation Guide is now available. Find out how to get to the venue!
4. Conference Registration is now available. This year we set the early rate as : $550 for ACM/IEEE member, $650 for non-member, $400 for student member, $500 for student non-member; late and on-site $100+early rate; Monday pass $350, Tuesday pass $400.
5. The conference venue is the Sheraton La Jolla, California. We have a discounted group rate of $149 per night. The rate is good for reservations made for 8/10 and 8/13. For reservations made for 8/8-8/10 and 8/14-8/17, the discounted rate is also available based on hotel availability. Click here to reserve.

Venue

• Sheraton La Jolla, California, USA

Topics

Specific topics include, but are not limited to, the following two main areas, each with three sub-areas:

1. Technology, Circuits, and Architecture

   1. Technologies
      Emerging Low-power technologies for Device, Interconnect, Logic, Memory, 2.5/3D, Cooling, Harvesting, Sensors, Optical, Printable, Biomedical, Battery, and Alternative energy storage devices.
   2. Circuits
      Low-power digital circuits for Logic, Memory arrays, Reliability, Clocking, Power gating, Resiliency, Near-Threshold Voltage (NTV), Sub-threshold, Variability, and Digital assist schemes; Low-power analog/mixed-signal circuits for Wireless, RF, MEMS, AD/DA Converters, I/O circuits, PLLs/DLLS, Imaging, DC-DC converters, and Analog assist schemes
   3. Logic and Architecture
      Low-power logic and microarchitectures for SoC designs, Processor cores (compute, graphics and other special purpose cores), Register file, Cache, Memory, Arithmetic/Signal processing, Encryption, Variability, and Asynchronous design, Non-conventional computing.

2. CAD, Systems, and Software

   1. CAD Tools and Methodologies
      CAD tools and methodologies for low-power and thermal-aware design addressing power estimation, optimization, reliability and variation impact on power, and power-down approaches at all design levels: physical, circuit, gate, RTL, behavioral, and algorithmic.
   2. Systems and Platform
      Low-power, power-aware, and thermal-aware system design and platforms for microprocessors, DSP, embedded systems, FPGA, ASIC, SoC, heterogeneous computing, novel systems, and system level power implications due to reliability and variability. Data center power delivery and cooling.
   3. Software and Applications
      Energy-efficient, energy-aware, and thermal-aware software and application design including scheduling and management, reliability and variability optimizations, and emerging low power applications like approximate and brain-inspired computing, low power distributed body-area/in-body networks, and sensor networks.
      

Submissions on new topics: emerging technologies, architectures/platforms, and applications are particularly encouraged. Submissions should be full-length papers of up to 6 pages (double-column, ACM SIG Proceedings format, available at http://www.acm.org/sigs/publications/proceedings-templates), including all illustrations, tables, references and an abstract of no more than 100 words. Papers exceeding the six-page limit will not be reviewed. Submission must be anonymous: papers identifying the authors and/or with explicit references to their prior work will be automatically rejected. Electronic submission in pdf format only via the web is required. More information on electronic submission to ISLPED’14 can be found later at this website. Invited Talk, Panel, and Tutorial Proposal Deadline: March 14, 2014.